sadly, public available patents cover quite little part of PVR2 internals.
I think I've seen only 2, one quite detail explain translucency sorting and other about Tiled render in general (not indepth).
so, there is 3 good sources of info - mentioned leaked docs, few public patents, and docs from Katana SDK (training section was useful, there is nice explanation of TA and ISP/TSP function in term of performance, how many time/clocks takes various tasks, etc)
Better understand the TA Bining Process & rasterization
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