The manual says clearly that there is a dedicated "divide by zero" exception for FPU.
As I do not achieve to trigger "divide by zero", I decide to move to the level up.
I said in a earlier post that in SH4 the SR register (Status register) contains a bit in position 15 called FD.
This FD bit is "FPU disable bit" : when FD = 1 there is no FPU instruction access. Besides, if we try to execute
an FPU instruction when FD bit is 1 in SR, the "general FPU disable" exception is triggered.
FD: FPU disable bit (cleared to 0 by a reset)
FD = 1: An FPU instruction causes a general FPU disable exception, and if the FPU instruction is in a delay
slot, a slot FPU disable exception is generated. (FPU instructions: H'F*** instructions, LDC(.L)/STS(.L)
instructions for FPUL/FPSCR)
In the manual the "general FPU disable" is described as follow :
General FPU Disable Exception
- Source: Decoding of an FPU instruction* not in a delay slot with SR.FD =1
- Transition address: VBR + H'0000 0100
- Transition operations:
The PC and SR contents for the instruction at which this exception occurred are saved in SPC and SSR.
Exception code H'800 is set in EXPEVT. The BL, MD, and RB bits are set to 1 in SR, and a branch is made to
PC = VBR + H'0100.
So I try to register a simple handler.
Code: Select all
irq_handler savedHandler = irq_get_handler(EXC_GENERAL_FPU);
irq_set_handler(EXC_GENERAL_FPU, MyHandler);
Set bit FD of SR to 1.
Code: Select all
__asm__ __volatile__("MOV #1, R10"); //R10 = 1
__asm__ __volatile__("SHLL8 R10");
__asm__ __volatile__("SHLL2 R10");
__asm__ __volatile__("SHLL2 R10");
__asm__ __volatile__("SHLL2 R10");
__asm__ __volatile__("STC SR, R11"); //SR -> R11
__asm__ __volatile__("MOV R11, R12"); //R11 -> R12
__asm__ __volatile__("OR R10, R11"); //R11 = R11 | R10
__asm__ __volatile__("LDC R11, SR"); //R11 -> SR
And execute any FPU instruction.
Code: Select all
__asm__ __volatile__("FADD FR0, FR1");
But the code produces no errors ....
I suspect none FPU exceptions is triggered (and not divide by zero too).
There is something wrong somewhere but i am stuck at this point ...