Quzar wrote:
1) Pin 43 of the G2 is the clock, and is marked as such, but I don't see it being connected to anything. Am I missing something? Is it in fact connected but in a diagramming way I'm not familiar with?
It looks like the interface is done in an asynchronous style; the only chip that actually needs a "clock" is the '573, and it's being clocked by /EN.
Quzar wrote:
2) The VCC on IC6 comes seemingly from nowhere. I assume this is because there are different sorts of actual chips that may run on different voltage ranges (ttl or um that other one), but is the rest simply unpowered? I guess this could just be for pullup on that line (I'm horrible with IC components).
The supply connections are almost certainly implied, and left out to simplify the schematic. The Vcc connection shown on IC6 is to hardwire the direction of the buffer, and is left in because you wouldn't necessarily connect that pin to a supply rail.
Quzar wrote:
3) I've seen the three built (afaik? were there more? I thought I had seen that jj1dom had made one, but can't find it now) Bitmaster's original, Kiyoshi IKEHARA's (he made at least two versions though), and Dan Potters (although that started as ISA and had IDE added on). It seems that bitmaster and kiyoshi's originals each are plain and follow the circuit diagram by bm directly. In a later revision of kiyoshi's though, and on dan's it's clear that there are capacitors all over the place. How might these be used here and how important would they be (as it seems the thing works without)?
They're probably bypass capacitors added to stabilize the circuit. Generally, you'd add a "large" capacitor across Vcc and ground near the DC supply connection for the entire board, and then a "small" one across the Vcc and ground pins of each chip (the exact values of "large" and "small" here are subject to interpretation; the manufacturer of your chips might have application notes with specific recommendations for the family you're using). These basically act to filter noise (which is generated by the switching behavior of CMOS logic circuits) out of the supply rails. They're not absolutely critical, but without them there's an increased risk of random glitches.
Hope this helps.