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PostPosted: Thu Mar 12, 2009 2:13 pm 
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I've been working at building one of these for myself, specifically going the way of trying to get it to fit into a modem casing (as opposed to using a G2 extender and breakout board). I'm just having a few problems in reading his schematics. I've attached the original PDF below for those who don't have access to it otherwise. Here are my questions:

1) Pin 43 of the G2 is the clock, and is marked as such, but I don't see it being connected to anything. Am I missing something? Is it in fact connected but in a diagramming way I'm not familiar with?

2) The VCC on IC6 comes seemingly from nowhere. I assume this is because there are different sorts of actual chips that may run on different voltage ranges (ttl or um that other one), but is the rest simply unpowered? I guess this could just be for pullup on that line (I'm horrible with IC components).

3) I've seen the three built (afaik? were there more? I thought I had seen that jj1dom had made one, but can't find it now) Bitmaster's original, Kiyoshi IKEHARA's (he made at least two versions though), and Dan Potters (although that started as ISA and had IDE added on). It seems that bitmaster and kiyoshi's originals each are plain and follow the circuit diagram by bm directly. In a later revision of kiyoshi's though, and on dan's it's clear that there are capacitors all over the place. How might these be used here and how important would they be (as it seems the thing works without)?

Thanks to anyone who can give any input. As reference, I've included links to the relevant sites I know of, and attached the diagram from bitmaster and the datasheets for the three required ICs.

http://www.fuzzymuzzle.com/Bitmaster/DC ... erface.htm
http://www.fuzzymuzzle.com/Kiyoshi/IDE_HDD.htm
http://dreamcast.fuzzymuzzle.com/dc-ide.htm
http://gamedev.allusion.net/hdwrprj/navi/

edit: seems pdfs aren't allowed as attachments. Luckily it's online here.

I'm using AH style chips: SN74AHC00N, SN74AHC574N, and SN74AHC245N.

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PostPosted: Thu Mar 12, 2009 7:42 pm 
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Quzar wrote:
1) Pin 43 of the G2 is the clock, and is marked as such, but I don't see it being connected to anything. Am I missing something? Is it in fact connected but in a diagramming way I'm not familiar with?
It looks like the interface is done in an asynchronous style; the only chip that actually needs a "clock" is the '573, and it's being clocked by /EN.

Quzar wrote:
2) The VCC on IC6 comes seemingly from nowhere. I assume this is because there are different sorts of actual chips that may run on different voltage ranges (ttl or um that other one), but is the rest simply unpowered? I guess this could just be for pullup on that line (I'm horrible with IC components).
The supply connections are almost certainly implied, and left out to simplify the schematic. The Vcc connection shown on IC6 is to hardwire the direction of the buffer, and is left in because you wouldn't necessarily connect that pin to a supply rail.

Quzar wrote:
3) I've seen the three built (afaik? were there more? I thought I had seen that jj1dom had made one, but can't find it now) Bitmaster's original, Kiyoshi IKEHARA's (he made at least two versions though), and Dan Potters (although that started as ISA and had IDE added on). It seems that bitmaster and kiyoshi's originals each are plain and follow the circuit diagram by bm directly. In a later revision of kiyoshi's though, and on dan's it's clear that there are capacitors all over the place. How might these be used here and how important would they be (as it seems the thing works without)?
They're probably bypass capacitors added to stabilize the circuit. Generally, you'd add a "large" capacitor across Vcc and ground near the DC supply connection for the entire board, and then a "small" one across the Vcc and ground pins of each chip (the exact values of "large" and "small" here are subject to interpretation; the manufacturer of your chips might have application notes with specific recommendations for the family you're using). These basically act to filter noise (which is generated by the switching behavior of CMOS logic circuits) out of the supply rails. They're not absolutely critical, but without them there's an increased risk of random glitches.

Hope this helps.

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PostPosted: Thu Mar 12, 2009 8:49 pm 
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Thanks a bundle, that does help. I've not ever done anything more complicated than those radioshack 500-in-1 testkit things. That second question would have been the worst, as I'm doing this extremely tightly and once I added more I really wouldn't have been able to add those after putting it all together. I was just following it literally so I most certainly would not have powered any of the ICs =P.

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PostPosted: Sat Mar 14, 2009 2:01 am 
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Looks very interesting! i thought the schematic would be more complex.
Besides netBSD, is there any libary that may allow HD access (from KOS for example).


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PostPosted: Wed Mar 18, 2009 3:21 pm 
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WIP pictures (warning, very ugly):
Image Image Image

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PostPosted: Wed Mar 18, 2009 3:27 pm 
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NICE JOB, keep us updated, problem I see with this is the max speed that will be reached, probably slow...

But it is indeed a lot of work, good luck with it.


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PostPosted: Thu Mar 19, 2009 9:00 am 
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Cool to see somebody here is finally attempting this. Good Luck!

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PostPosted: Fri Mar 20, 2009 12:57 am 
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So there are actually 2 diferent designs for the interface! (I thought that there was only 1 and that its was the fpga based)...

Well where could i find documentation on how to fiddle with the mapple bus?

P.S. : How did he got the HD <-> DC communication to work (software wise of course).


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PostPosted: Fri Mar 20, 2009 11:28 am 
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Jae686 wrote:
So there are actually 2 diferent designs for the interface! (I thought that there was only 1 and that its was the fpga based)...

Well where could i find documentation on how to fiddle with the mapple bus?
No schematics for an actual adapter, but pretty much everything else can be found here and here (command/response stuff for specific Maple bus devices like pad and VMU are elsewhere on the site).

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PostPosted: Wed Apr 08, 2009 11:35 pm 
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So, any news ?


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PostPosted: Thu Apr 09, 2009 2:20 am 
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Soldered in a few more wires. I'm not very good at it so it takes me quite some time. I'm graduating in a month so I've had very little free time.

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PostPosted: Tue Jul 21, 2009 1:02 pm 
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Progress?


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PostPosted: Tue Jul 21, 2009 8:50 pm 
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Moving back in from college and working construction at this house my mother bought while I was gone has sucked up all my time. I havn't even unpacked my DC stuff =\. I still have all the pieces though and it's ready to go, but I'll probably have to start over as it seems I was misreading the schematics and didn't take into account powering the various ICs -_-. It's on the top of my list of DC hardware stuff, thanks for reminding me.

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PostPosted: Thu Oct 01, 2009 3:42 pm 
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any more progress?

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PostPosted: Thu Oct 01, 2009 5:26 pm 
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Ooo. Thanks for reminding me. I hadn't unpacked any of my soldering gear or components. So... no, there hasn't been.

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PostPosted: Sun Oct 04, 2009 1:11 pm 
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I'll be watching this closely - I really want to try this one day. Need to get better with computers and programing first (havnt really got a clue about that side of it).

I'm confident with a soldering iron and know I can do that side of things though.

Keep us updated... :wink:

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PostPosted: Wed Jan 26, 2011 12:46 pm 
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Anymore news on this? Did it ever get finished?

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PostPosted: Fri Jan 28, 2011 9:05 am 
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I forgot about this. Would be pretty sweet if released soon.

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PostPosted: Sat Jan 29, 2011 5:20 am 
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=*( Oh the guilt. Last thing done on this was realizing that I had screwed up my components because the schematic was in a sort of shorthand, so I had been leaving out a lot of necessary connections.

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PostPosted: Thu Apr 28, 2011 7:40 am 
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Quzar, you mind if I ask what the point of this is? Are we capable of booting games off of a hard drive?

I've got three Dreamcasts collecting dust in a box, only for the sole reason that the GD-ROM drives no longer work.


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